1. Field of the Invention
This invention relates to a semiconductor integrated circuit.
2. Description of Related Art
In a manufacturing process of a related semiconductor integrated circuit, electric inspection called a probe test is executed for the semiconductor integrated circuit in a (wafer) state that the semiconductor integrated circuit is formed on a semiconductor substrate together with a lot of other semiconductor integrated circuits. The probe test is executed by making probes come in contact with pads formed on a wafer. To increase inspection efficiency by increasing the number of integrated circuits which are inspected at a time, it is necessary to reduce the number of probes which come in contact with the pads of each integrated circuit. In other words, it is necessary to reduce the number of pads which come in contact with the probes in each integrated circuit.
So far, a method of short-circuiting two pads by means of a fuse is known as a method of reducing the number of pads which come in contact with the probes. According to this method, by supplying a predetermined electric potential to one of the two pads, the same electric potential is also supplied to the other of the pads. By blowing the fuse after finish of inspection, the two pads become independent from each other. Such a technique is disclosed in Japanese Laid-Open Patent Publication No. Hei10-284554.